A processor, call it P1, has a clock rate of 3.6 GHz and a voltage of 1.25 V. Assume that, on average, it consumes 10 W of static power and 90 W of dynamic power. Another processor, call it P2, has a clock rate of 3.4 GHz and a voltage of 0.9 V. It consumes 30 W of static power and 40 W of dynamic power on average.

For each processor, find the average capacitive loads. Round to 2 decimal places if necessary.
C of P1 = ___________ nF
C of P2 = ___________ nF
If the static power in each processor is to be reduced by 10%, what should the new voltages be reduced to in order to maintain the same leakage current? Round to 3 decimal places if necessary.
Vdd of P1 = ___________ V
Vdd of P2 = ___________ V

Respuesta :

Answer: (i). C of P1 = 3.2 ˣ 10⁻⁸ nF and

C of P2 = 2.90 ˣ 10⁻⁸ nF

(ii). Vdd of P1 = 0.9V

Vdd of P2 = 0.9V

Explanation:

To begin solving this problem, we would define the parameters given;

we have that the capacitance load (CL) = Dynamic Power / (0.5 × V² × Clock rate)

The average capacitance load ;

For C of P1 processor,

P1  is given thus;

CL = 90 / (0.5 × 1.25² × 3.6 × 10⁹)  = 3.2 ˣ 10⁻⁸ nF

For C of P1 processor,

Average capacitive loads

P2:

CL = 40 / (0.5 ˣ 0.9² ˣ 3.4 ˣ 10⁹) = 2.90 ˣ 10⁻⁸ nF

(ii). given that the voltage is reduced by 10% for P1 and P2 processor

For Vdd of P1:

Therefore the total power dissipated power = Voltage ˣ Leakage current

∴ the total dissipated power = 10 + 90 = 100W

Recalling we have;

P = V × I

100 = 1.25 × I

leakage current (I) = 80 A

so total dissipated power × 0.9 = 90W

90 = 1.25α × 80

α = 0.9V

For Vdd of P2:

total dissipated power = 30 + 40 = 70W

so inputting power

70 = 0.9 × I

I = 78, where I is the leakage current

∴ total dissipated power × 0.9 = 63W

solving this gives

63 = 0.9α × 78

where α = 0.9V

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